Opamp Level Shift & Scaling Circuit Analysis

Generally DAC output will be from 0V to Vref, and to get bipolar output we typically use this circuit that convert [0:Vref] -> [-Vref: Vref], with Rf = Ri.

But what else can this circuit do if we are able to tweak Rf, Ri? Can it gives Vo > Vref?

There are few ways to get the transfer function of this circuit block, namely:

1. circuit simulation - overkilled for such a simply circuit - don't you think so?
2. algebra manipulation - going to be tough for those not doing it for a while
3. graphical analysis base on circuit inspection - quick and intuitive - my personal favourite

in this example, I'm going to shows you alternative #2, and #3, have a nice read-up!

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The algebra way:

Vo = Vdac + i * Rf
Vo = Vdac + [(Vdac-Vref)/Ri] * Rf
Vo = Vdac*(1+Rf/Ri) - Vref*(Rf/Ri)

but it is time consuming to write Rf/Ri, let's just replace it by α

Vo = Vdac*(1+α) - Vref*α

but Vdac is a function of Vref, let Vdac = β*Vref, where 0<= β<=1

Vo = β*Vref*(1+α) - Vref*α
Vo = Vref* [β + α*β - α]

where
α = Rf/Ri
β = dacData/dacFullResolution

it is always good idea to drop in some number to verify nothings goes wrong in the algebra derivation, let's do it now

let α = Rf/Ri = 1
Vo = Vref* [2β - 1]
β = 0: Vo = -Vref
β = 1: Vo = Vref
which is expected

Now that we have the final equation, we can inspect the equation as ratio of Rf/Ri changes:

Rf/Ri = 0:

• Vo = Vref*β

Rf/Ri = infinity:

• from Vo = Vref* [β + α*β - α]
• when β = 0 (Vdac = 0): Vo = negative infinity
• when β = 1 (Vdac = Vref): Vo = Vref

Conclusion:

from general equation of y = m*x + c, this circuit configuration allows us to configure maximum m = +1 @ c = 0, minimum m = negative infinity @ c = negative infinity, and max Vout = Vref.

For example, you are not getting more that Vo = Vref regardless of what Ri, Rf values you used.

 

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The Graphical Way:

Step#1:

Figuring out what is input, what is output:

1. draw out XY axis
2. acknowledge that we control dac output directly, hence x-axis is label as Vdac
3. Vo is the output of circuit block - we want to know what happen to Vo as Vdac changes - thus Vo as label for y-axis

Draw out the xy boundaries by circuit inspection:

1. from circuit inspection - dac output can only varies between 0V to Vref, thus we draw at vertical line at x = Vref.
2. from circuit inspection - when Vdac = Vref:
   • since inputs of op-amp is essentially the same potential - the inverting input is at Vref,
   • there is no voltage drop across Ri, both side of Ri at Vref, thus i=0A, and since there is no voltage drop across Rf, Vo=Vref
   • thus draw a horizontal lines at y = Vref

Step#2:

Acknowledge there is essentially one variable to play around - that is, the ratio of Rf/Ri :

1. from circuit inspection - consider the case Rf/Ri = 0, it means Ri = open and i=0, and the amp act as voltage follower , Vo = Vdac, from y = m*x + c, this gives m =1, c =0, draw a line that cross point (x,y) = (Vref, Vref), (0,0), this is one of our boundary.
2. from circuit inspection - consider the case Rf/Ri = infinity, when Vdac =Vref, Vo = Vref, when Vdac is slightly less than Vref, Vo = negative infinity, draw a vertical lines at x = Vref.
3. region bounded by the 2 lines above is the possible circuit function for this circuit configuration. For example, you are not getting more that Vo = Vref regardless of what Ri, Rf values you used.

About Debugging Guidelines

In debugging – sometimes I got carried away with my “instinct”, although mostly it get me to the right conclusion in a short time – it is definitely too much of “black magic” to the newbies.
So my humble advice to the beginners is to think about every circuit or IC as a functional block – define the boundary yourself or from a schematic – make sense of the circuit does. To state the obvious, in a typical circuit block:

• will have a function name in the schematic - this contains important info regarding what the block supposed to do
• will generally has input, output, supply and control signals

identify which is which will generally give you a sense of how to debug the block

Once you know that the input/output relationship does not hold (assuming that you understand what the block supposed to do), here are some of the steps that might helps

1. Bias the circuit so that the block will have known state (or consider overwrite the input from a known source), use DMM to confirm all the DC pins, starting with supplies pins.
2. Confirm the input output relationship – if it is not correct, break this block into smaller block and repeat the process (take a look at binary search debugging post: http://electroniccircuitdesignsharing.blogspot.com/2013/02/debugbinary-search.html).
3. If the block is already an IC, check for part number, orientation, cold solder join, missing solder joints before “accusing” it as faulty part.
4. remember that sometimes certain failure mode needs more than a DMM to be used (see http://electroniccircuitdesignsharing.blogspot.com/2012/06/why-oscilloscope-is-needed-for-circuit.html) , so if DMM cannot give you convergence, you should consider to use another instrument (depending on what this block supposed to do).

so good luck with your troubleshooting!

Thinking In Terms of Current

Some years ago, there’s this movie called “Lost In Translation”, now, I have not watched it, but that reminded me of how I used to viewed or analyse circuit diagrams. During my early days – I cannot think or view the circuit in terms of current flow, as such everything being translated into voltage terms. Since DMM is handy for measuring circuit voltages – things looked good.
But as years goes by – when I got better in circuit understanding – I realize that by translating current into voltage (using resistance, impedance, equations), there are valuable circuit insights being lost in translation. For example – if you don’t think in terms of current flows – you cannot understand how decoupling works shown in previous posts:
http://electroniccircuitdesignsharing.blogspot.com/2012/07/3d-visualization-of-better-decoupling.html
http://electroniccircuitdesignsharing.blogspot.com/2012/07/3d-current-flow-for-inverting-op-amp.html
To show you what I meant, from my earlier post about load line: http://electroniccircuitdesignsharing.blogspot.com/2012/05/load-line-bjt-signal-gain-amplification.html
There is this BJT amplifier shown as below:

In this circuit – assuming that it is in linear region, collector current changes with base current directly, in fact Icollector = hfe * Ibase, where hfe is the current gain of BJT. Yes, Vout might be our parameter of interest, but it really is just a “byproduct” of this action: Vout = Vdd – (Ic * RC).
So for beginner – I would like to say when we view or analyse circuit – it is worth the effort to try to think in terms of current – it will open a whole new world.

3D Visualization Of Bad Decoupling Capacitor Placement

Placement matters: what happen when a decoupling capacitor being placed far far away from the IC that it is supposed to decouple? Compare diagram below to those in previous posts:

• http://electroniccircuitdesignsharing.blogspot.com/2012/07/3d-current-flow-for-inverting-op-amp.html
• http://electroniccircuitdesignsharing.blogspot.com/2012/07/3d-visualization-of-better-decoupling.html

This time, I have removed all traces that that is not related to positive supply decouling capacitor discharge path. Obviously in this placement, the decoupling capacitor discharge path is much longer that those in posts stated above.  In this case there are much larger series inductance that discourage good decoupling performance (as it is more troublesome for capacitor to discharge).

Top view of top signals – positive supply decoupling capacitor discharge path

Top view of bottom signals – positive supply decoupling capacitor discharge path

3D Visualization Of Better Decoupling Capacitor Placement

Placement matters: One way to decide how good a decoupling capacitor placement is by looking at the discharge current loop. Continue from previous post (http://electroniccircuitdesignsharing.blogspot.com/2012/07/3d-current-flow-for-inverting-op-amp.html), re-placing the decoupling capacitor near IC pin6 to bottom and just under supply pin will allow much better decoupling performance due to smaller discharge current loop. Compare diagrams below with the ones shown in previous post for details.

Top view of top signals

Top view of bottom signals

3D current flow for inverting op-amp with negative input pulse

I have always wanted to draw a 3-dimensional illustrative diagram on how the current flow – for the SMT circuit – with the Google Sketch up (mentioned in http://electroniccircuitdesignsharing.blogspot.com/2012/03/tools-for-circuit-design.html), finally I can create something shown in this post. Hopefully it is clear enough for you to understand how current flows after reading this.

Input and output voltages:

How the current flow – Inverting Amp with negative input pulse:

Top view of bottom signals:

Why do we have capacitors at IC supply pins - another perspective

Why de-coupling cap?

Before we even try, we need to redo the schematic into some sort of diagram as shown below:

From the diagram it is obvious that there is no way for the amp to force the desired voltage across the load, since the current will need to be from the battery and the connection has series trace inductance!

Where and how does the current flow when the load resistor is being replaced by realistic next stage?

What’s the current loop for a step positive voltage at vin?

The flow:

  

Note that there’s no ground current involve other than the interconnect of 2 decoupling capacitors. – current does not always flows in ground interconnect

Where and how does the current flow?

All circuit has different current loop, let’s start with something simple such as a voltage buffer circuit shown above. Before we even try, we need to redo the schematic into some sort of diagram as shown below :

Positive pulse at output:

Negative pulse at output:

What is the matter with the Ground symbol? How is it being relate to the actual circuit built?

This is a tough one. The symbol is a must for PSPICE simulation; it is called “Ground” or “Circuit Common”.

It is a confusion that takes me years to get it right. For beginner, just take it as all nodes connected to this symbol being electrically joint up through wires – the trick is to acknowledge that wires are not perfect conductor, they has resistance, inductance…

To give you a feel on how real world’s “Ground” connection like, refer to the schematic diagram below – the black wires are the so called “Ground”, and in diagram below “Star Ground” connection is being used, however, this is usually not the case:

Why is it that in text book circuit analysis the “load” of circuit is always a resistor?

What if in my circuit my next stage is a speaker, or a lamp, or another Opamp circuit?

Answer:

In short it is to ease the circuit analysis.

The way the circuit was drawn implies that the analysis “assume” that whatever being connected to amp output eventually will not affect the behaviour of the circuit. Actually, the load (in this case, R1) can be anything that demand current within the capability of the amp, and if the load is not, then we just need to insert “something” or "buffer circuit" in between the amp and the load to ensure the behaviour of the circuit remains the same. This is what you would call divide and conquer – analyse/design one stage at one time.

Why do we have capacitors at IC supply pins

In analog/digital circuit, we always see capacitors being connected from supply pins to circuit ground, but why?

From my perspective, the two primary reasons for those caps are:

Reason #1:

Connection from supply to IC has impedance - those caps (placed near the IC) will supply most of fast current demand which gives less voltage fluctuation on supply pin when supply current flows

Reason #2:

The supplies  are not ideal, regardless of them being a battery or switch mode supply, there is always internal impedance/resistance, and those capacitors will make sure the IC "see" low impedance supplies across the frequency of its bandwidth (remember that capacitor impedance drops as frequency increase)