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Showing posts with label divide and conquer. Show all posts
Showing posts with label divide and conquer. Show all posts

Friday, 5 July 2013

Opamp Level Shift & Scaling Circuit Analysis–Notes for Beginners

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Follow up on previous post, a few points to note on algebra analysis - to state the obvious for those who already know, to clarify things for those with humble beginning like myself:
  • acknowledge consciously that the goal is to put variables into y = mx + c
  • you need to know at the end of derivation what is on the left hand side – in other words – you need to know what is going to be y, and x before you even derive it
  • always substitute repeating complex terms with a symbol – it keep you mind in the bigger picture – and save you from typo – or miss-spelled mistakes. You can always re-substitute the terms back at the end of derivation.
  • watch out for stuffs that can be derived from basics variable, and make use of them – for example, identify that Vdac is a function of Vref, and let Vdac = β*Vref, where 0<= β<=1.
  • always good idea to drop in some number to verify nothings goes wrong in the algebra derivation
  • take it easy – nobody is going to punish you if you get it wrong – have a bit of curiosity, have fun.

Saturday, 20 April 2013

About Debugging Guidelines

In debugging – sometimes I got carried away with my “instinct”, although mostly it get me to the right conclusion in a short time – it is definitely too much of “black magic” to the newbies.
So my humble advice to the beginners is to think about every circuit or IC as a functional block – define the boundary yourself or from a schematic – make sense of the circuit does. To state the obvious, in a typical circuit block:
  • will have a function name in the schematic - this contains important info regarding what the block supposed to do
  • will generally has input, output, supply and control signals
identify which is which will generally give you a sense of how to debug the block
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Once you know that the input/output relationship does not hold (assuming that you understand what the block supposed to do), here are some of the steps that might helps
  1. Bias the circuit so that the block will have known state (or consider overwrite the input from a known source), use DMM to confirm all the DC pins, starting with supplies pins.
  2. Confirm the input output relationship – if it is not correct, break this block into smaller block and repeat the process (take a look at binary search debugging post: http://electroniccircuitdesignsharing.blogspot.com/2013/02/debugbinary-search.html).
  3. If the block is already an IC, check for part number, orientation, cold solder join, missing solder joints before “accusing” it as faulty part.
  4. remember that sometimes certain failure mode needs more than a DMM to be used (see http://electroniccircuitdesignsharing.blogspot.com/2012/06/why-oscilloscope-is-needed-for-circuit.html) , so if DMM cannot give you convergence, you should consider to use another instrument (depending on what this block supposed to do).
so good luck with your troubleshooting!




Saturday, 16 February 2013

Debug–Binary Search

Sometimes, debugging of complicated circuits is an unavoidable task. To ease this process, some concept about binary search will proves to be helpful.
The idea about debugging using binary search as follow:
  • For a know series of circuit block that give un-expected result - always try to determine which half the the series that cause the problem
  • Repeat the iteration till faulty block found
For example:
In the diagram shown below, let x be the input, and output of each block be yn, where n is the block number, and block 15 coloured in red is the faulty block.
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start: y16/x is not expected
  1. confirm y8/x is expected or not
  2. since y8/x is expected, we know the faulty block should be some where from block 9 to block 16, evaluate y12/y8
  3. since y12/y8 is working, faulty block should be some where from block 13 to block 16, evaluate block y14/y12
  4. y14/y12 is still working, faulty block should be some where from block 15 to block 16
thus regardless of where the faulty block is, the search terminate fast. In this example, if you were to use linear search method by evaluating from block #1 , block #2… , it will take you more time.

Saturday, 24 March 2012

Understand Loading


When deriving Zout_G1 - it is assumed that driving source of block G1 is of low impedance (such as opamp output stage), analysis will be different if this is not the case


Let’s define Gideal = G1*G2, and Gactual is the actual G1, G2 overall gain that factor in inter-stage loading. Then Gerr = 100% * (Gideal - Gactual)/Gideal


From the graph, it can be seen that:
1.       As driving stage (G1 in this case) output impedance becomes much lower than the input impedance of loading stage (G2 in this case), each block becomes more and more independent of each other.
2.       For system design, it is critical to have each block having high input impedance and low output impedance, so that we can design each stage by itself and still be able to cascade them together